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ISPLSI1032E70LT – CPLD ispLSI® 1000E Family 6K Gates 128 Macro Cells 70MHz 5V 100-Pin TQFP – obsolete

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ISPLSI1032E70LT – CPLD ispLSI® 1000E Family 6K Gates 128 Macro Cells 70MHz 5V 100-Pin TQFP – obsolete
EU RoHS Not Compliant  ECCN (US) EAR99 Part Status Obsolete HTS 8542.39.00.01 Family Name ispLSI® 1000E Program Memory Type ROMLess Number of Logic Blocks/Elements 32 Number of Global Clocks 4 Number of Macro Cells 128 Device System Gates 6000 Data Gate No Maximum Number of User I/Os 64 Number of Flip Flops 192 In-System Programmability Yes Programmability Yes Reprogrammability Support Yes Maximum Internal Frequency (MHz) 100 Maximum Clock to Output Delay (ns) 8 Maximum Propagation Delay Time (ns) 17.5 Speed Grade 70 Individual Output Enable Control Yes Minimum Operating Supply Voltage (V) 4.75 Maximum Operating Supply Voltage (V) 5.25 Typical Operating Supply Voltage (V) 5 Maximum Operating Current (mA) 190(Typ) Minimum Operating Temperature (°C) 0 Maximum Operating Temperature (°C) 70 Supplier Temperature Grade Commercial Tradename ispLSI Standard Package Name QFP Pin Count 100 Supplier Package TQFP Mounting Surface Mount Package Height 1.4 Package Length 14 Package Width 14 PCB changed 100 Lead Shape Gull-wing